| 2025 | ISCAS | Analysis of Clock Jitter in VCO-ADCs Under Presence of Mismatch and Blocking Signals. | Javier Granizo, Victor Medina, Luis Hernndez, Rubn Garvi |
| 2025 | ISCAS | Explaining Sigma-Delta Modulators with Pulse Frequency Modulation. | Victor Medina, Pieter Rombouts, Luis Hernndez |
| 2023 | ISCAS | Analysis of in-band Spurious Tones of VCO-based Analog Filters and Mitigation Techniques. | Victor Medina, Dante Loi, Pieter Rombouts, Luis Hernndez |
| 2022 | ISCAS | A Phase-Encoded Voice Features Extraction Circuit Using Digital Mixers and Analog Filters based on Ring Oscillators. | Rubn Garvi, Eric Gutierrez, Victor Medina, Luis Hernndez |
| 2022 | ISCAS | A maximally-digital VCO-ADC with inherent mixing input capability. | Victor Medina, Rubn Garvi, Eric Gutierrez, Luis Hernndez |
| 2022 | ISCAS | Optimal reconfiguration instant in ΣΔ Modulators. | Pablo Vera, Dietmar Straeussnigg, Victor Medina, Luis Hernndez, Susana Patn |
| 2020 | ISCAS | Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection. | Fernando Cardes, Victor Medina, Susana Patn, Luis Hernndez |
| 2020 | ISCAS | A Model of Continuous-Time Sigma Delta Modulation Based on Pulse Frequency Encoding. | Victor Medina, Susana Patn, Eric Gutierrez, Luis Hernndez |