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Vishal Saxena

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

2

Active years

2015–2025

Best venue rank

C

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASElectronic Photonic Integrated Circuits (EPICs): Fundamentals and Applications.Vishal Saxena
2024ISCASA Sub-1pJ/bit Laser Power Independent 32Gb/s Silicon Photonic EAM Driver in 65nm CMOS.Shubham Mishra, Vishal Saxena
2023ISCASPower Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits.Vikas Kumar, Shubham Mishra, Vishal Saxena
2022ISCASHybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use.Anuar Dorzhigulov, Shubham Mishra, Vishal Saxena
2022ISCASA Hybrid CMOS Photonic 25Gbps Microring Transmitter with a -0.5-1.2V Direct-Coupled Drive.Shubham Mishra, Md Jubayer Shawon, Anuar Dorzhigulov, Vishal Saxena
2021ISCASA Mixed-Signal Convolutional Neural Network Using Hybrid CMOS-RRAM Circuits.Vishal Saxena
2020ISCASA Process-Variation Robust RRAM-Compatible CMOS Neuron for Neuromorphic System-on-a-Chip.Vishal Saxena
2018ISCASEnergy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip.Vishal Saxena, Xinyu Wu, Kehan Zhu
2017IJCNNEnabling bio-plausible multi-level STDP using CMOS neurons with dendrites and bistable RRAMs.Xinyu Wu, Vishal Saxena
2017ISCASRealization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter.Kehan Zhu, Sakkarapani Balagopal, Xinyu Wu, Vishal Saxena
2015IJCNNA CMOS spiking neuron for dense memristor-synapse connectivity for brain-inspired computing.Xinyu Wu, Vishal Saxena, Kehan Zhu