Visvesh S. Sathe
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
2
Active years
2003–2016
Best venue rank
A
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | DATE | All-digital hybrid-control buck converter for Integrated Voltage Regulator applications. | Ta-Tung Yen, Bin Yu, Visvesh S. Sathe |
| 2015 | ISLPED | Fully-integrated switched-capacitor voltage regulator with on-chip current-sensing and workload optimization in 32nm SOI CMOS. | Xiaoyang Mi, Debashis Mandal, Visvesh S. Sathe, Bertan Bakkaloglu, Jae-sun Seo |
| 2015 | ISLPED | Analysis and optimization of CMOS switched-capacitor converters. | Visvesh S. Sathe, Jae-sun Seo |
| 2014 | ISLPED | A deterministic-dither-based, all-digital system for on-chippower supply noise measurement. | Kannan A. Sankaragomathi, William Anthony Smith, Brian P. Otis, Visvesh S. Sathe |
| 2014 | ISLPED | Quasi-resonant clocking: a run-time control approach for true voltage-frequency-scalability. | Visvesh S. Sathe |
| 2005 | ISLPED | A GHz-class charge recovery logic. | Visvesh S. Sathe, Marios C. Papaefthymiou, Conrad H. Ziesler |
| 2003 | ISLPED | A 225 MHz resonant clocked ASIC chip. | Conrad H. Ziesler, Joohee Kim, Visvesh S. Sathe, Marios C. Papaefthymiou |