| 2025 | DSD | Side-channel analysis of Chacha20 implemented in software. | Luks Dank, Vojtech Miskovsk, Mats Oleksk |
| 2025 | DSD | Building a Side-Channel Attack Scheme on SipHash FPGA Implementation. | Vt Masek, Vojtech Miskovsk, Mats Oleksk |
| 2024 | DSD | Impact of Compiler Optimization Flags on Side-Channel Information Leakage of SipHash Algorithm. | Mats Oleksk, Vojtech Miskovsk |
| 2022 | DDECS | Correlation Power Analysis of SipHash. | Mats Oleksk, Vojtech Miskovsk |
| 2021 | DSD | Secure and dependable: Area-efficient masked and fault-tolerant architectures. | Vojtech Miskovsk, Hana Kubtov, Martin Novotn |
| 2018 | DSD | Dummy Rounds as a DPA Countermeasure in Hardware. | Stanislav Jerabek, Jan Schmidt, Martin Novotn, Vojtech Miskovsk |
| 2018 | DSD | Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative. | Petr Socha, Vojtech Miskovsk, Hana Kubtov, Martin Novotn |
| 2017 | DDECS | Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches. | Petr Socha, Vojtech Miskovsk, Hana Kubtov, Martin Novotn |
| 2017 | DSD | Influence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design. | Jan Riha, Vojtech Miskovsk, Hana Kubtov, Martin Novotn |