Wei-Po Hsin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2026–2026
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | COMPSAC | SiliconMind-V1: Multi-Agent Distillation and Debug-Reasoning Workflows for Verilog Code Generation. | Mu-Chi Chen, Yu-Hung Kao, Po-Hsuan Huang, Shao-Chun Ho, Hsiang-Yu Tsou, I-Ting Wu, En-Ming Huang, Yu-Kai Hung, Wei-Po Hsin, Cheng Liang, Chia-Heng Tu, Shih-Hao Hung, H. T. Kung |
| 2026 | ISCA | NeRArch-Sim: A Unified Simulator for Benchmarking and DSE of Neural Rendering Accelerators. | Cheng-Jhih Shih, Chaojian Li, Chihao Yu, Hsuan-Chen Fang, Sixu Li, Wei-Po Hsin, Lexington Allen Whalen, Hyewon Suh, Greg Eisenhauer, Ling Liu, Yingyan Celine Lin |