| 2025 | DATE | Clock and Power Supply-Aware High Accuracy Phase Interpolator Layout Synthesis. | Siou-Sian Lin, Shih-Yu Chen, Yu-Ping Huang, Tzu-Chuan Lin, Hung-Ming Chen, Wei-Zen Chen |
| 2025 | ISCAS | Dynamic ADC and Equalizer Adaptation with Background SNR Monitoring for a DSP-Based PAM-4 Receiver. | You-Cheng Tu, Rui-Yong Kuo, Wei-Zen Chen |
| 2020 | ISCAS | A 32 Gb/s PAM-4 Optical Transceiver with Active Back Termination in 40 nm CMOS Technology. | Wei-Hsiang Ho, Yi-Hsun Hsieh, Boris Murmann, Wei-Zen Chen |
| 2018 | ISCAS | A 20-Gb/s, 2.4 pJ/bit, Fully Integrated Optical Receiver with a Baud-Rate Clock and Data Recovery. | Yuan-Sheng Lee, Wei-Zen Chen |
| 2014 | ISCAS | A 0.6 V, 1.66mW energy harvester and audio driver for tympanic membrane transducer with wirelessly optical signal and power transfer. | Jhong-Ting Jian, Yu-Lin Song, Chia-Fone Lee, Yuan-Fang Chou, Wei-Zen Chen |
| 2012 | ISCAS | A 40 Gbps optical receiver analog front-end in 65 nm CMOS. | Shun-Tien Chou, Shih-Hao Huang, Zheng-Hao Hong, Wei-Zen Chen |
| 2011 | ICCAD | Fast analog layout prototyping for nanometer design migration. | Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen |
| 2010 | ISCAS | A 2.4 GHz reference-less wireless receiver for 1Mbps QPSK demodulation. | Wei-Zen Chen, Wei-Wen Ou, Tai-You Lu, Shun-Tien Chou, Song-Yu Yang |
| 2006 | ISCAS | A low power programmable PRBS generator and a clock multiplier unit for 10 Gbps serdes applications. | Wei-Zen Chen, Guan-Sheng Huang |