| 2026 | ASPDAC | BALANCE: Bit and Layer-Aware Lightweight ECC Design Method for In-Flash Computing Based LLM Inference Accelerator. | Changwei Yan, Lishuo Deng, Mingbo Hao, Cai Li, Weiwei Shan |
| 2025 | ASPDAC | Balancing Objective Optimization and Constraint Satisfaction for Robust Analog Circuit Optimization. | Jintao Li, Haochang Zhi, Jiang Xiao, Yanhan Zeng, Weiwei Shan, Yun Li |
| 2025 | ASPDAC | Analog Circuit Transfer Method Across Technology Nodes via Transistor Behavior. | Haochang Zhi, Jintao Li, Yun Li, Weiwei Shan |
| 2025 | DAC | UVLLM: An Automated Universal RTL Verification Framework using LLMs. | Yuchen Hu, Junhao Ye, Ke Xu, Jialin Sun, Shiyue Zhang, Xinyao Jiao, Dingrong Pan, Jie Zhou, Ning Wang, Weiwei Shan, Xinwei Fang, Xi Wang, Nan Guan, Zhe Jiang |
| 2025 | DATE | Efficient Hold Buffer Optimization by Supply Noise-Aware Dynamic Timing Analysis. | Lishuo Deng, Changwei Yan, Cai Li, Zhuo Chen, Weiwei Shan |
| 2025 | ISCAS | Variation-Adaptive Negative Bitline and Skip Bitline Pre-charge Scheme for Low-Power SRAM. | Lishuo Deng, Changwei Yan, Yiran Zhang, Xin Si, Weiwei Shan |
| 2025 | ISCAS | A 250M-2.5GHz Two-Stage Duty-Cycle Corrector with 10%-90% Correction Range and 3-Cycle Correction Latency for Mitigating Aging Effects. | Zhiting Li, Lishuo Deng, Cai Li, Changwei Yan, Zhangrui Qian, Weiwei Shan |
| 2025 | ISCAS | A 40nm Early-Warning AVFS Design with Path Activation-Based Monitoring Point Optimization. | Cai Li, Zhuoyuan Li, Kaize Zhou, Lishuo Deng, Junyi Qian, Xiaojie Yin, Kana Meng, Weiwei Shan |
| 2025 | ISCAS | An All-Digital Voltage Droop Detector Utilizing a Multi-Phase Clock assisted Nyquist Counter. | Zhangrui Qian, Kaize Zhou, Yuxuan Du, Zhiting Li, Weiwei Shan |
| 2024 | ICCAD | AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis. | Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng |
| 2024 | ICCAD | MEIC: Re-thinking RTL Debug Automation using LLMs. | Ke Xu, Jialin Sun, Yuchen Hu, Xinwei Fang, Weiwei Shan, Xi Wang, Zhe Jiang |
| 2023 | ICCAD | Multi-Task Evolutionary to PVT Knowledge Transfer for Analog Integrated Circuit Optimization. | Jintao Li, Haochang Zhi, Weiwei Shan, Yongfu Li, Yanhan Zeng, Yun Li |
| 2023 | ISCAS | IVATS: A Leakage Reduction Technique Based on Input Vector Analysis and Transistor Stacking in CMOS Circuits. | Lishuo Deng, Keran Li, Weiwei Shan |
| 2022 | DAC | An energy-efficient seizure detection processor using event-driven multi-stage CNN classification and segmented data processing with adaptive channel selection. | Jiahao Liu, Zirui Zhong, Yong Zhou, Hui Qiu, Jianbiao Xiao, Jiajing Fan, Zhaomin Zhang, Sixu Li, Yiming Xu, Siqi Yang, Weiwei Shan, Shuisheng Lin, Liang Chang, Jun Zhou |
| 2018 | ISCAS | Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. | Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Weiwei Shan, Jun Yang, Weisheng Zhao |
| 2018 | TrustCom | Correlation-Based Electromagnetic Analysis Attack Using Haar Wavelet Reconstruction with Low-Pass Filtering on an FPGA Implementaion of AES. | Aiguo Bu, Wentao Dai, Minyi Lu, Hao Cai, Weiwei Shan |
| 2018 | TrustCom | A Compact, Lightweight and Low-Cost 8-Bit Datapath AES Circuit for IoT Applications in 28nm CMOS. | Minyi Lu, Ao Fan, Jiaming Xu, Weiwei Shan |
| 2018 | TrustCom | Differential Power Analysis of 8-Bit Datapath AES for IoT Applications. | Jiaming Xu, Ao Fan, Minyi Lu, Weiwei Shan |
| 2014 | DAC | A Side-channel Analysis Resistant Reconfigurable Cryptographic Coprocessor Supporting Multiple Block Cipher Algorithms. | Weiwei Shan, Longxing Shi, Xingyuan Fu, Xiao Zhang, Chaoxuan Tian, Zhipeng Xu, Jun Yang, Jie Li |
| 2009 | IDEAL | Adaptive Fuzzy Logic Controller and Its Application in MEMS Mirror Actuation Feedback Control. | Weiwei Shan, Xiqun Zhu, Yuan Ma |