William C. Athas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
9
Venues
3
Active years
1993–2002
Best venue rank
A*
Where they publish
Papers
9 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | ISLPED | Compact models for estimating microprocessor frequency and power. | William C. Athas, Lynn Youngs, Andrew Reinhart |
| 2001 | ISLPED | Theory and practical implementation of harmonic resonant rail driver. | Joong-Seok Moon, William C. Athas, Peter A. Beerel |
| 2000 | ISLPED | Practical considerations of clock-powered logic. | William C. Athas |
| 1999 | ISLPED | Retractile clock-powered logic. | Nestoras Tzartzanis, William C. Athas |
| 1999 | SC | Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture. | Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, Joonseok Park |
| 1997 | ISLPED | AC-1: a clock-powered microprocessor. | William C. Athas, Nestoras Tzartzanis, Lars J. Svensson, Lena Peterson, Huimin Li, Xing Yu Jiang, Peiqing Wang, Weichuan Liu |
| 1996 | ISLPED | Energy-recovery CMOS for highly pipelined DSP designs. | William C. Athas, Weichuan Liu, Lars J. Svensson |
| 1996 | ISLPED | Energy recovery for the design of high-speed, low-power static RAMs. | Nestoras Tzartzanis, William C. Athas |
| 1993 | ISCA | 16-Bit vs. 32-Bit Instructions for Pipelined Microprocessors. | John D. Bunda, Donald S. Fussell, Roy M. Jenevein, William C. Athas |