Win Chaivipas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2006–2012
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ASPDAC | A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS. | Ryo Minami, Hiroki Asada, Ahmed Musa, Takahiro Sato, Ning Li, Tatsuya Yamaguchi, Yasuaki Takeuchi, Win Chaivipas, Kenichi Okada, Akira Matsuzawa |
| 2011 | ASPDAC | A 58-63.6GHz quadrature PLL frequency synthesizer using dual-injection technique. | Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chaivipas, Kenichi Okada, Akira Matsuzawa |
| 2006 | ISCAS | Feedforward compensation technique for all digital phase locked loop based synthesizers. | Win Chaivipas, Akira Matsuzawa, Philipus Chandra Oh |