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Xianghe Meng

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2026–2026

Best venue rank

C

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASA 2-GHz 5.06-mW Phase Accumulator Employing Dynamic Regulation for High-Speed Direct Digital Frequency Synthesizers in 65-nm CMOS.Bin Kong, Kai Cheng, Hongyu Ren, Xianghe Meng, Xiaoyu Shan, Yunbo Huang, Li Wang, Zunsong Yang, Bo Li