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Xianzeng Guo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2025–2026

Best venue rank

A

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEInput Sparsity Aware In-Memory Computing Macro Based on SOT-MRAM Multi-Level Cell for Efficient Deep Neural Network Acceleration.Chao Wang, Qihang Gao, Xianzeng Guo, Zhongzhen Tong, Zhaohao Wang, Weisheng Zhao
2026DATEHigh-Performance and High-Density NAND-Like SOT-MRAM for FinFET Technology Nodes.Chao Wang, Xianzeng Guo, Luman Xiang, Zhaohao Wang, Weisheng Zhao
2025ISCASHigh-Speed VGSOT-MRAM Design for Non-Volatile Cache Memories.Xianzeng Guo, Chao Wang, Luman Xiang, Zhaohao Wang