| 2026 | ISCAS | A Lightweight Die-to-Die Interconnect with Co-Scheduling Framework for Scalable Multi-Chip Inference Accelerators. | Jie Ren, Jingyang Chen, De Ma, Xiaopeng Yu, Xiaolei Zhu |
| 2025 | ISCAS | An SRAM-Based Digital Compute-in-Memory Macro with Dual-Bit Input Data Sparsification and Restructuring for Energy-Efficient MAC. | Jingyang Chen, De Ma, Zhiping Yu, Xiaolei Zhu |
| 2025 | ISCAS | Low Power and High Efficiency Power Management Circuits Based on Flexible LTPO Technologies for Wearable Applications. | Yunxi Gou, Xuguang Sun, Leilai Shao, Xiaolei Zhu |
| 2025 | ISCAS | A 1FeFET-1T-1C based Compute-in-Memory Macro with Capacitor Reused Pipeline SAR ADC. | Minghan Jiang, Rui Xiao, Xinran Li, Shuaiting Li, Xiaolei Zhu, Yishu Zhang, Haibin Shen, Kejie Huang |
| 2024 | DATE | RLPlanner: Reinforcement Learning Based Floorplanning for Chiplets with Fast Thermal Analysis. | Yuanyuan Duan, Xingchen Liu, Zhiping Yu, Hanming Wu, Leilai Shao, Xiaolei Zhu |
| 2018 | INFOCOM | Improving signal modulation recognition using principal component analysis and compressive sensing. | Yuyao Li, Zheng Dou, Xiaolei Zhu, Chengzhuo Shi |
| 2017 | QRS | A Method for Modulation Recognition Based on Entropy Features and Random Forest. | Zhen Zhang, Yibing Li, Xiaolei Zhu, Yun Lin |
| 2009 | ASPDAC | A 1 GHz CMOS comparator with dynamic offset control technique. | Xiaolei Zhu, Sanroku Tsukamoto, Tadahiro Kuroda |
| 2005 | IJCNN | Circuit implementation of multi-thresholded neuron (MTN) using BiCMOS technology. | Xiaolei Zhu, Jizhong Shen, Baoyong Chi, Zhihua Wang |