| 2026 | ASPDAC | Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration. | Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst |
| 2026 | ASPLOS | The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead. | Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst |
| 2026 | DATE | Torrent : A Distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement. | Yunhao Deng, Fanchen Kong, Xiaoling Yi, Ryan Antonio, Marian Verhelst |
| 2026 | ISCAS | A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access. | Xiaoling Yi, Ryan Antonio, Yunhao Deng, Fanchen Kong, Joren Dumoulin, Jun Yin, Marian Verhelst |
| 2025 | ASPDAC | OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling. | Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst |
| 2025 | DAC | DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators. | Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst |
| 2025 | ICCD | XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs. | Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst |
| 2025 | ISLPED | An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems. | Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst |
| 2025 | ISLPED | Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning. | Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst |
| 2024 | DATE | SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture. | Zheng Wu, Xiaoling Yi, Li Shang, Fan Yang |
| 2023 | DAC | Graph Representation Learning for Microarchitecture Design Space Exploration. | Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang |
| 2022 | ISCAS | An Automated Compiler for RISC-V Based DNN Accelerator. | Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang |
| 2022 | ISCAS | NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models. | Xiaoling Yi, Jiangnan Yu, Zheng Wu, Xiankui Xiong, Dong Xu, Chixiao Chen, Jun Tao, Fan Yang |