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Xizhe Shi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

3

Active years

2024–2026

Best venue rank

B

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPDACHeteroSTA: A CPU-GPU Heterogeneous Static Timing Analysis Engine with Holistic Industrial Design Support.Zizheng Guo, Haichuan Liu, Xizhe Shi, Shenglu Hua, Zuodong Zhang, Chunyuan Zhao, Runsheng Wang, Yibo Lin
2026ASPDACHeteroLatch: A CPU-GPU Heterogeneous Latch-Aware Timing Analysis Engine.Xizhe Shi, Zizheng Guo, Yibo Lin, Zuodong Zhang, Yun Liang, Runsheng Wang
2025DATEHandling Latch Loops in Timing Analysis with Improved Complexity and Divergent Loop Detection.Xizhe Shi, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang
2024ICCADHeteroExcept: A CPU-GPU Heterogeneous Algorithm to Accelerate Exception-aware Static Timing Analysis.Zizheng Guo, Zuodong Zhang, Wuxi Li, Tsung-Wei Huang, Xizhe Shi, Yufan Du, Yibo Lin, Runsheng Wang, Ru Huang