| 2021 | ICCAD | Hierarchical Layout Synthesis and Optimization Framework for High-Density Power Module Design Automation. | Imam Al Razi, Quang Le, H. Alan Mantooth, Yarui Peng |
| 2020 | ASPDAC | Chiplet-Package Co-Design For 2.5D Systems Using Standard ASIC CAD Tools. | M. D. Arafat Kabir, Yarui Peng |
| 2020 | ICCAD | Coupling Extraction and Optimization for Heterogeneous 2.5D Chiplet-Package Co-Design. | M. D. Arafat Kabir, Dusan Petranovic, Yarui Peng |
| 2015 | DAC | Design, packaging, and architectural policy co-optimization for DC power integrity in 3D DRAM. | Yarui Peng, Bon Woong Ku, Youn-Sik Park, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Sung Kyu Lim |
| 2015 | ICCAD | Full-chip Inter-die Parasitic Extraction in Face-to-Face-Bonded 3D ICs. | Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim |
| 2014 | DAC | On Enhancing Power Benefits in 3D ICs: Block Folding and Bonding Styles Perspective. | Moongon Jung, Taigon Song, Yang Wan, Yarui Peng, Sung Kyu Lim |
| 2014 | DAC | Fast and Accurate Full-chip Extraction and Optimization of TSV-to-Wire Coupling. | Yarui Peng, Dusan Petranovic, Sung Kyu Lim |
| 2013 | DAC | Full-chip multiple TSV-to-TSV coupling extraction and optimization in 3D ICs. | Taigon Song, Chang Liu, Yarui Peng, Sung Kyu Lim |
| 2013 | ICCAD | On accurate full-chip extraction and optimization of TSV-to-TSV coupling elements in 3D ICs. | Yarui Peng, Taigon Song, Dusan Petranovic, Sung Kyu Lim |
| 2013 | ISLPED | Design and analysis of ultra low power processors using sub/near-threshold 3D stacked ICs. | Sandeep Kumar Samal, Yarui Peng, Yang Zhang, Sung Kyu Lim |