Yasong Cao
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
6
Active years
2021–2025
Best venue rank
A
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DATE | WinAcc: Window-based Acceleration of Neural Networks Using Block Floating Point. | Xin Ju, Jun He, Mei Wen, Jing Feng, Yasong Cao, Junzhong Shen, Zhaoyun Chen, Yang Shi |
| 2025 | DATE | SparSynergy: Unlocking Flexible and Efficient DNN Acceleration Through Multi-Level Sparsity. | Jingkui Yang, Mei Wen, Junzhong Shen, Jianchao Yang, Yasong Cao, Jun He, Minjin Tang, Zhaoyun Chen, Yang Shi |
| 2022 | HPCC | MZ Core: An Enhanced Matrix Acceleration Engine for HPC/ AI Applications. | Yasong Cao, Mei Wen, Junzhong Shen, Sheng Liu, Zhi Wang, Minjin Tang, Yahao Fang, Jianchao Yang, Renyu Yang, Yuhan Kang, Jiawei Fei |
| 2022 | ICCD | BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. | Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang |
| 2022 | ICPP | Mentha: Enabling Sparse-Packing Computation on Systolic Arrays. | Minjin Tang, Mei Wen, Yasong Cao, Junzhong Shen, Jianchao Yang, Jiawei Fei, Yang Guo, Sheng Liu |
| 2022 | ISCAS | S-SIM: A Simulator for Systolic Array-based DNN Accelerators with Tile Access Awareness. | Yuhang Li, Mei Wen, Renyu Yang, Junzhong Shen, Yasong Cao, Jianan Wang |
| 2022 | ISPASS | TILE-SIM: A Systematic Approach to Systolic Array-based Accelerator Evaluation. | Yuhang Li, Mei Wen, Jiawei Fei, Junzhong Shen, Yasong Cao |
| 2021 | HPCC | Embrace the Conflicts: Exploring the Integration of Single Port Memory in Systolic Array-based Accelerators. | Renyu Yang, Junzhong Shen, Mei Wen, Yasong Cao, Yuhang Li |