Ye-Jyun Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2010–2012
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ASPDAC | Memory access aware power gating for MPSoCs. | Ye-Jyun Lin, Chia-Lin Yang, Jiao-Wei Huang, Naehyuck Chang |
| 2010 | ICCAD | Hierarchical memory scheduling for multimedia MPSoCs. | Ye-Jyun Lin, Chia-Lin Yang, Tay-Jyi Lin, Jiao-Wei Huang, Naehyuck Chang |