Yeu-Horng Shiau
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1999–2018
Best venue rank
B
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | ISCAS | Live Demonstration: Hardware Design of Video Defogging Method for Real-Time Applications. | Pei-Yin Chen, Yao-Tsung Kuo, Shih-Hsiang Lin, Yeu-Horng Shiau |
| 2001 | ISCAS | Efficient VLSI architectures for the biorthogonal wavelet transform by filter bank and lifting scheme. | Jer-Min Jou, Yeu-Horng Shiau, Chin-Chi Liu |
| 1999 | ASPDAC | Hazard-Free Synthesis and Decomposition of Asynchronous Circuits. | Ren-Der Chen, Jer-Min Jou, Yeu-Horng Shiau |
| 1999 | ASPDAC | A Scalable Pipelined Architecture for Separable 2-D Discrete Wavelet Transform. | Jer-Min Jou, Pei-Yin Chen, Yeu-Horng Shiau, Ming-Shiang Liang |
| 1999 | ASPDAC | A New Pipelined Architecture for Fuzzy Color Correction. | Jer-Min Jou, Shiann-Rong Kuang, Yeu-Horng Shiau |