Yi-Hang Chen
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2011–2014
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | DATE | Area minimization synthesis for reconfigurable single-electron transistor arrays with fabrication constraints. | Yi-Hang Chen, Jian-Yu Chen, Juinn-Dar Huang |
| 2011 | ASPDAC | Throughput optimization for latency-insensitive system with minimal queue insertion. | Juinn-Dar Huang, Yi-Hang Chen, Ya-Chien Ho |