Yi-Shan Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2024–2026
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | Neural Network-Based Contiguous Carrier Aggregation Digital Predistortion Design for Sub-THz Power Amplifier in Baseband Transmitter. | Cheng-Hsuan Lai, Chung-Lun Tu, Yi-Shan Huang, Shyh-Jye Jou |
| 2026 | ISCAS | High Throughput LDPC Decoder with Ultra-low BER Using Hardware Sharing across Two Code Rates for IEEE Std. 802.15.3d. | Ching Liang Yeh, Yi-Shan Huang, Chung-Lun Tu, Shyh-Jye Jou |
| 2025 | ISCAS | A Deep Learning Accelerator for Modified YOLOv7-tiny with Shortcut-Aware Layer Fusion. | Wei-En Huang, Yi-Shan Huang, Shyh-Jye Jou |
| 2024 | ISCAS | A 128 Gb/s LDPC Decoder Using Partial Syndrome-based Dynamic Decoding Scheme for Terahertz Wireless Multi-Media Networks. | Tsung-Han Wu, Ching Liang Yeh, Yi-Shan Huang, Shyh-Jye Jou |