Yibin Ye
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
6
Active years
1997–2011
Best venue rank
A*
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | ISNN | ELM-Based Time-Variant Neural Networks with Incremental Number of Output Basis Functions. | Yibin Ye, Stefano Squartini, Francesco Piazza |
| 2006 | ISCAS | Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches. | Yibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Vivek De |
| 2005 | ICCD | A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors. | Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail |
| 2005 | ISCAS | Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses. | Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Vivek De |
| 2004 | DAC | Design optimizations for microprocessors at low temperature. | Arman Vassighi, Ali Keshavarzi, Siva G. Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De |
| 2002 | DAC | Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. | Tanay Karnik, Yibin Ye, James W. Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar |
| 2000 | DAC | Dynamic noise analysis in precharge-evaluate circuits. | Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De |
| 1999 | ASPDAC | Power Consumption in XOR-Based Circuits. | Yibin Ye, Kaushik Roy, Rolf Drechsler |
| 1999 | DAC | Mixed- | Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De |
| 1997 | ASPDAC | Efficient synthesis of AND/XOR networks. | Yibin Ye, Kaushik Roy |
| 1997 | DAC | A Graph-Based Synthesis Algorithm for AND/XOR Networks. | Yibin Ye, Kaushik Roy |
| 1997 | ISLPED | Quasi-static energy recovery logic and supply-clock generation circuits. | Yibin Ye, Kaushik Roy, Georgios I. Stamoulis |