Yida Liang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2026–2026
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | A 40-nm Resilient MLC RRAM Macro with Self-Referenced Time-Based Readout and 3-Bit Interleaved ECC Achieving 0.22 pJ/bit Read Energy. | Junjie He, Zhen Kong, Yida Liang, Humiao Li, Yida Li, Jiamin Li, Longyang Lin |
| 2026 | ISCAS | Mitigating Conductance Drift via In-Situ Calibration for Reliable RRAM-Based CIM Edge Inference. | Zhen Kong, Weirong Dong, Junjie He, Zhengke Yang, Jun Lan, Yida Liang, Jiamin Li, Yida Li, Longyang Lin |