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Yongzhen Chen

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

1

Active years

2017–2025

Best venue rank

C

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASA Rapid Binary Search-Based Capacitor Mismatch Calibration Algorithm.Yifei Bai, Huajun Yao, Fengyi Mei, Cuixia Wang, Yongzhen Chen, Jiangfeng Wu
2023ISCASA 4.75-64 Gb/s PAM-4 Wireline Transmitter with 3-tap FFE in 28-nm CMOS.Junkun Chen, Youzhi Gu, Miaomiao Xu, Yongzhen Chen, Cuixia Wang, Jiangfeng Wu
2023ISCASA Foreground LSB-Based Capacitor Mismatch Calibration Method in An 18-bit SAR ADC.Jie Ding, Yongzhen Chen, Cuixia Wang, Jiangfeng Wu
2023ISCASA Wideband Receiver I/Q Mismatch Calibration Method in FDD Transceiver.Huajun Yao, Yangxin Xiang, Yongzhen Chen, Cuixia Wang, Jiangfeng Wu
2022ISCASA 2.5-GS/s Time-Interleaved SAR-Assisted Ringamp-Based Pipelined ADC with Digital Background Calibration.Jingchao Lan, Danfeng Zhai, Yongzhen Chen, Zhekan Ni, Xingchen Shen, Fan Ye, Junyan Ren
2018ISCASAn Operational Amplifier Assisted Input Buffer and An Improved Bootstrapped Switch for High-Speed and High-Resolution ADCs.Yuefeng Cao, Tianli Zhang, Yongzhen Chen, Fan Ye, Junyan Ren
2018ISCASA 800 MS/s, 12-Bit, Ringamp-Based SAR assisted Pipeline ADC with Gain Error Cancellation.Yongzhen Chen, Zhekan Ni, Yuefeng Cao, Fan Ye, Junyan Ren
2018ISCASA 100MS/S 12-bit Coarse-Fine SAR ADC with Shared Split-CDAC.Manxin Li, Yongzhen Chen, Fan Ye, Junyan Ren
2017ISCASA 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier.Yongzhen Chen, Jingjing Wang, Hang Hu, Fan Ye, Junyan Ren