Yoshiyasu Ogasawara
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2005–2009
Best venue rank
National
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | DSD | An Effective Replacement Strategy of Cache Memory for an SMT Processor. | Yoshiyasu Ogasawara, Hironori Nakajo |
| 2007 | PDPTA | Toward Parallel and Distributed Processing on High-Density Network with Mobile Devices. | Satoshi Watanabe, Yoshiyasu Ogasawara, Ippei Tate, Hirofumi Yano, Hironori Nakajo |
| 2006 | PDPTA | Towards Reconfigurable Cache Memory for a Multithreaded Processor. | Yoshiyasu Ogasawara, Ippei Tate, Satoshi Watanabe, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Mitaro Namiki, Hironori Nakajo |
| 2006 | PDPTA | A Model of Implementable SMT Processor on FPGA. | Ippei Tate, Yoshiyasu Ogasawara, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Satoshi Watanabe, Mitaro Namiki, Hironori Nakajo |
| 2005 | KES | How to Make Robot a Robust and Interactive Communicator. | Yoshiyasu Ogasawara, Masashi Okamoto, Yukiko I. Nakano, Yong Xu, Toyoaki Nishida |
| 2005 | PDPTA | A New Model of Reconfigurable Cache for an SMT Processor and its FPGA Implementation. | Yoshiyasu Ogasawara, Norito Kato, Masanori Yamato, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo |