Yu-Wen Tsay
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
1993–1998
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | ICCAD | Integrating logic retiming and register placement. | Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin |
| 1993 | ICCAD | Combining technology mapping and placement for delay-optimization in FPGA designs. | Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin |