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Yuanqing Cheng

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

22

Venues

5

Active years

2014–2026

Best venue rank

A*

Where they publish

Papers

22 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPDACFull-Chip Thermal Map Estimation by Multimodal Data Fusion via Denoising Diffusion.Jing Li, Wei Xing, Yuquan Sun, Yuanqing Cheng
2026ASPDACΦ-BO: Physics-Informed Bayesian Optimization for Multi-Port Decoupling Capacitor Placement in 2.5-D Chiplets.Quansen Wang, Yuchuan Lin, Zhuohua Liu, Wei Xing, Wei Zhang, Ning Xu, Yuanqing Cheng
2025DATECool3D: Cost-Optimized and Efficient Liquid Cooling for 3D Integrated Circuits.Jing Li, Bingrui Zhang, Yuquan Sun, Wei Xing, Yuanqing Cheng
2025DATEA Comprehensive Inductance-Aware Modeling Approach to Power Distribution Network in Heterogeneous 3D Integrated Circuits.Quansen Wang, Vasilis F. Pavlidis, Yuanqing Cheng
2024ASPDACBoCNT: A Bayesian Optimization Framework for Global CNT Interconnect Optimization.Hang Wu, Ning Xu, Wei W. Xing, Yuanqing Cheng
2024DACMAUnet: Multiscale Attention U-Net for Effective IR Drop Prediction.Mingyue Wang, Yuanqing Cheng, Yage Lin, Kelin Peng, Shunchuan Yang, Zhou Jin, Wei W. Xing
2024ICCADARO: Autoregressive Operator Learning for Transferable and Multi-fidelity 3D-IC Thermal Analysis With Active Learning.Mingyue Wang, Yuanqing Cheng, Weiheng Zeng, Zhenjie Lu, Vasilis F. Pavlidis, Wei Xing
2023DACTOTAL: Multi-Corners Timing Optimization Based on Transfer and Active Learning.Wei W. Xing, Zheng Xing, Rongqi Lu, Zhelong Wang, Ning Xu, Yuanqing Cheng, Weisheng Zhao
2023ICCADOPT: Optimal Proposal Transfer for Efficient Yield Optimization for Analog and SRAM Circuits.Yanfang Liu, Guohao Dai, Yuanqing Cheng, Wang Kang, Wei W. Xing
2022ASPDACFault Testing and Diagnosis Techniques for Carbon Nanotube-Based FPGAs.Kangwei Xu, Yuanqing Cheng
2022ICCADGIA: A Reusable General Interposer Architecture for Agile Chiplet Integration.Fuping Li, Ying Wang, Yuanqing Cheng, Yujie Wang, Yinhe Han, Huawei Li, Xiaowei Li
2018ISCASNEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs.Chen Liu, Yuanqing Cheng, Ying Wang, Youguang Zhang, Weisheng Zhao
2017ASPDACBuilding energy-efficient multi-level cell STT-RAM caches with data compression.Liu Liu, Ping Chi, Shuangchen Li, Yuanqing Cheng, Yuan Xie
2017ICCADThermosiphon: A thermal aware NUCA architecture for write energy reduction of the STT-MRAM based LLCs.Bi Wu, Yuanqing Cheng, Pengcheng Dai, Jianlei Yang, Youguang Zhang, Dijun Liu, Ying Wang, Weisheng Zhao
2016ASPDACArchitecture design with STT-RAM: Opportunities and challenges.Ping Chi, Shuangchen Li, Yuanqing Cheng, Yu Lu, Seung-Hyuk Kang, Yuan Xie
2016ICCADODESY: a novel 3T-3MTJ cell design with optimized area DEnsity, scalability and latencY.Linuo Xue, Yuanqing Cheng, Jianlei Yang, Peiyuan Wang, Yuan Xie
2016ISCASAES design improvement towards information safety.Liang Wu, Xiaoxiao Wang, Xiaoying Zhao, Yuanqing Cheng, Donglin Su, Aixin Chen, Qihang Shi, Mark Tehranipoor
2016ISCASAn efficient all-digital IR-Drop Alarmer for DVFS-based SoC.Liting Yu, Xiaoxiao Wang, Yuanqing Cheng, Xiaoying Zhao, Pengyuan Jiao, Aixin Chen, Donglin Su, LeRoy Winemberg, Mehdi Sadi, Mark Tehranipoor
2016ISCASQuantitative evaluation of reliability and performance for STT-MRAM.Liuyang Zhang, Aida Todri-Sanial, Wang Kang, Youguang Zhang, Lionel Torres, Yuanqing Cheng, Weisheng Zhao
2015ISCASA case of precision-tunable STT-RAM memory design for approximate neural network.Ying Wang, Lili Song, Yinhe Han, Yuanqing Cheng, Huawei Li, Xiaowei Li
2015ISCASA body-biasing of readout circuit for STT-RAM with improved thermal reliability.Lun Yang, Yuanqing Cheng, Yuhao Wang, Hao Yu, Weisheng Zhao, Aida Todri-Sanial
2014ASPDACPower supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration.Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel