Yuanyuan Han
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2016–2025
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | A Refresh-Reduction Digital eDRAM CIM Macro using Asymmetric Error Tolerance Scheme. | Yue Cao, Yuanyuan Han, Keji Zhou, Chengshuo Yu, Tianci Cai, Jianguo Yang |
| 2025 | ISCAS | Penta Interlocking Dual Ports 14T SRAM with Inside-Bit interleaving Layout Isolation for Soft Error Recovery. | Xu Luo, Yuanyuan Han, Xu Cheng, Xiaoyang Zeng |
| 2016 | ANT | Oil-immersed Transformer Internal Thermoelectric Potential Fault Diagnosis Based on Decision-tree of KNIME Platform. | Yuanyuan Han, Dongming Zhao, Hui Hou |