Yujin Chung
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2021–2023
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | ISCA | F4T: A Fast and Flexible FPGA-based Full-stack TCP Acceleration Framework. | Junehyuk Boo, Yujin Chung, Eunjin Baek, Seongmin Na, Changsu Kim, Jangwoo Kim |
| 2022 | ASPLOS | CryoWire: wire-driven microarchitecture designs for cryogenic computing. | Dongmoon Min, Yujin Chung, Ilkwon Byun, Junpyo Kim, Jangwoo Kim |
| 2022 | HPCA | NeuroSync: A Scalable and Accurate Brain Simulator Using Safe and Efficient Speculation. | Hunjun Lee, Chanmyeong Kim, Minseop Kim, Yujin Chung, Jangwoo Kim |
| 2021 | ASPLOS | NeuroEngine: a hardware-based event-driven simulation system for advanced brain-inspired computing. | Hunjun Lee, Chanmyeong Kim, Yujin Chung, Jangwoo Kim |