| 2024 | ISCAS | A 10b 400MS/s 2x-Time-Interleaved 2-Then-1b/Cycle SAR ADC in 90nm CMOS. | Wei-Chung Lin, Yung-Chi Chang, Yung-Hui Chung |
| 2009 | SMC | Automatic Die Inspection for Post-sawing LED Wafers. | Chuan-Yu Chang, Yung-Chi Chang, ChunHsi Li, MuDer Jeng |
| 2005 | DATE | PEG, MPEG-4, and H.264 Codec IP Development. | Chung-Jr Lian, Yu-Wen Huang, Hung-Chi Fang, Yung-Chi Chang, Liang-Gee Chen |
| 2003 | ICIP | Platform architecture design for MEG-4 video coding. | Wei-Min Chao, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen |
| 2003 | ISCAS | Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile. | Wei-Min Chao, Tung-Chien Chen, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen |
| 2003 | ISCAS | Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder. | Chih-Wei Hsu, Yung-Chi Chang, Wei-Min Chao, Liang-Gee Chen |
| 2001 | ASPDAC | Design and implementation of JPEG encoder IP core. | Chung-Jr Lian, Liang-Gee Chen, Hao-Chieh Chang, Yung-Chi Chang |
| 2000 | ISCAS | Performance analysis and architecture evaluation of MPEG-4 video codec system. | Hao-Chieh Chang, Liang-Gee Chen, Mei-Yun Hsu, Yung-Chi Chang |
| 2000 | ISCAS | MPEG-4 video bitstream structure analysis and its parsing architecture design. | Hao-Chieh Chang, Yung-Chi Chang, Yuan-Bin Tsai, Chih-Peng Fan, Liang-Gee Chen |
| 1999 | ISCAS | A VLSI architecture design of VLC encoder for high data rate video/image coding. | Hao-Chieh Chang, Liang-Gee Chen, Yung-Chi Chang, Sheng-Chieh Huang |