Yunhao Zhou
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
5
Active years
2024–2026
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | AAAI | DynamicRTL: RTL Representation Learning for Dynamic Circuit Behavior. | Ruiyang Ma, Yunhao Zhou, Yipeng Wang, Yi Liu, Zhengyuan Shi, Ziyang Zheng, Kexin Chen, Zhiqiang He, Lingwei Yan, Gang Chen, Qiang Xu, Guojie Luo |
| 2025 | ACL | DeepRTL2: A Versatile Model for RTL-Related Tasks. | Yi Liu, Hongji Zhang, Yunhao Zhou, Zhengyuan Shi, Changran Xu, Qiang Xu |
| 2025 | DAC | Speculative Decoding for Verilog: Speed and Quality, All in One. | Changran Xu, Yi Liu, Yunhao Zhou, Shan Huang, Ningyi Xu, Qiang Xu |
| 2025 | ICCAD | MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs. | Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen, Chengjie Liu, Yi Liu, Yunhao Zhou, Yuxiang Zhao, Hefei Feng, Yinan Zhu, Gwok-Waa Wan, Xin Cheng, Weiyu Chen, Yongqi Fu, Chujie Chen, Chenhao Xue, Ying Wang, Yibo Lin, Jun Yang, Ning Xu, Xi Wang, Qiang Xu |
| 2025 | ICLR | DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Model. | Yi Liu, Changran Xu, Yunhao Zhou, Zeju Li, Qiang Xu |
| 2024 | DAC | Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. | Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li |
| 2024 | ICCAD | Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. | Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang |