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Zhanping Chen

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

8

Venues

4

Active years

1997–2001

Best venue rank

A*

Where they publish

Papers

8 indexed papers, newest first.

Year	Venue	Title	Authors
2001	ISLPED	Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors.	James W. Tschanz, Siva G. Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De
1999	DAC	Mixed-	Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De
1999	ISCAS	Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications.	Kaushik Roy, Liqiong Wei, Zhanping Chen
1998	DAC	A Power Macromodeling Technique Based on Power Sensitivity.	Zhanping Chen, Kaushik Roy
1998	DAC	Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits.	Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De
1998	ICCAD	Estimation of power sensitivity in sequential circuits with power macromodeling application.	Zhanping Chen, Kaushik Roy, Edwin K. P. Chong
1998	ISLPED	Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks.	Zhanping Chen, Mark Johnson, Liqiong Wei, Kaushik Roy
1997	ICCAD	Power sensitivity - a new method to estimate power dissipation considering uncertain specifications of primary inputs.	Zhanping Chen, Kaushik Roy, Tan-Li Chou