Skip to content

Zhaori Bi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

6

Active years

2022–2026

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASHOLMES: Hierarchical Optimization with poLygonal ModEling for Large-Scale AMS Placement.Guanhua Chen, Yujie Yan, Jiahua Liu, Zecheng Xu, Linxi Qiu, Yumao Wu, Zhiang Wang, Changhao Yan, Zhaori Bi, Keren Zhu
2026ISCASLayout-Aware Standard Cell Synthesis via Reparameterization Multi-Task Bayesian Optimization.Zhouyang Wu, Ruiyu Lyu, Keren Zhu, Zhiang Wang, Zhaori Bi, Changhao Yan, Xuan Zeng
2025DACMARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing.Wangzhen Li, Yuan Meng, Ruiyu Lyu, Changhao Yan, Keren Zhu, Zhaori Bi, Dian Zhou, Xuan Zeng
2025DACLook Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration.Xuyang Zhao, Yiyang Zhao, Zheng Wu, Tianning Gao, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025DATEINTO-OA: Interpretable Topology Optimization for Operational Amplifiers.Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng
2025ICCADLCTMwalk: GPU-Accelerated Transient Thermal Simulation for Liquid-Cooled 2.5D/3D ICs via Random Walks on Circuit Networks of Modified Compact Thermal Models.Zhixuan Dong, Yonghan Luo, Yuan Meng, Changhao Yan, Zhaori Bi, Keren Zhu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025ICCADNSTherm: An Error-Bounded Network-Stochastic Fusion Thermal Simulator for Geometry-Adaptable Chiplets via Diffeomorphic Mapping and Neural-Guided Variance Reduction.Yuan Meng, Yuyan Wang, Zhixuan Dong, Yonghan Luo, Changhao Yan, Keren Zhu, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2025ICCADBAGNet: A Boundary-Aware Graph Neural Network for SRAM Yield Analysis in Post-LayoutSimulation.Haoyang Sang, Changhao Yan, Zhaori Bi, Keren Zhu, Xuan Zeng
2025ICCADSeeing Through Designs: Attention-Based Knowledge Transfer for Preference-Guided Microarchitecture Search.Yiyang Zhao, Xuyang Zhao, Zhaori Bi, Ming Zhu, Qiwei Zhan, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2024ASPDACA Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper).Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng
2024ASPDACAsynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing.Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng
2024DACHiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing.Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng
2024DACEVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration.Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng
2024DATEtSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling.Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng
2024DATECircuits Physics Constrained Predictor of Static IR Drop with Limited Data.Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng
2024ICCADAnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis.Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng
2024ICCADRevisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis.Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2024UAIExploring High-dimensional Search Space via Voronoi Graph Traversing.Aidong Zhao, Xuyang Zhao, Tianchen Gu, Zhaori Bi, Xinwei Sun, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng
2023DACcVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis.Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng
2022ASPDACA Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench.Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou
2022ISCASA Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion.Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng