| 2026 | ASPDAC | Partitioning-free 3D-IC Floorplanning. | Shuo Ren, Zhen Zhuang, Rongliang Fu, Leilei Jin, Libo Shen, Bei Yu, Tsung-Yi Ho |
| 2026 | ASPDAC | Graph Attention-Based Current Crowding Analysis at TSV Interfaces in 3D Power Delivery Networks. | Zheng Yang, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim |
| 2026 | ASPDAC | DPO-3D: Differentiable Power Delivery Network Optimization via Flexible Modeling for Routability and IR-Drop Tradeoff in Face-to-Face 3D ICs. | Zhen Zhuang, Zheng Yang, Yuxuan Zhao, Jiawei Hu, Bei Yu, Sung Kyu Lim, Tsung-Yi Ho |
| 2026 | DATE | FastRW: An Efficient Random Walk Method for Steady-State Thermal Analysis. | Zixiao Wang, Tianshu Hou, Chenghan Wang, Zhen Zhuang, Tsung-Yi Ho, Farzan Farnia, Bei Yu |
| 2026 | DATE | ETLA-3D: Equivalent Thin Layer Aggregation based Thermal FEM for Hybrid Bonding F2F 3D ICs. | Chenghan Wang, Zhen Zhuang, Kai Zhu, Darong Huang, Luis Costero, Rongmei Chen, David Atienza, Tsung-Yi Ho |
| 2025 | ASPDAC | Fast Routing Algorithm for Mask Stitching Region of Ultra Large Wafer Scale Integration. | Zhen Zhuang, Quan Chen, Hao Yu, Tsung-Yi Ho |
| 2025 | DAC | GNN-MLS: Signal Routing in Mixed-Node 3D ICs through GNN-Assisted Metal Layer Sharing. | Jiawei Hu, Pruek Vanna-Iampikul, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim |
| 2025 | EMNLP | Conv-Basis: A New Paradigm for Efficient Attention Inference and Gradient Computation in Transformers. | Yingyu Liang, Heshan Liu, Zhenmei Shi, Zhao Song, Zhuoyan Xu, Jiale Zhao, Zhen Zhuang |
| 2025 | ICCAD | ChronoTE: Crosstalk-Aware Timing Estimation for Routing Optimization via Edge-Enhanced GNNs. | Leilei Jin, Rongliang Fu, Zhen Zhuang, Liang Xiao, Fangzhou Liu, Bei Yu, Tsung-Yi Ho |
| 2025 | ICCAD | MMPack: Multi-Mask Co-Design for Ultra-Large Wafer-Scale Package Integration. | Shanyi Li, Zhen Zhuang, Siyuan Liang, Bei Yu, Tsung-Yi Ho |
| 2023 | ICCAD | Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding. | Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong |
| 2022 | DATE | TRADER: A Practical Track-Assignment-Based Detailed Router. | Zhen Zhuang, Genggeng Liu, Tsung-Yi Ho, Bei Yu, Wenzhong Guo |
| 2022 | ICCAD | Multi-Package Co-Design for Chiplet Integration. | Zhen Zhuang, Bei Yu, Kai-Yuan Chao, Tsung-Yi Ho |
| 2021 | DATE | ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification. | Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, Wen-Hao Liu |
| 2020 | DATE | MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. | Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang |
| 2019 | ICNC | X-Architecture Steiner Minimal Tree Construction Based on Discrete Differential Evolution. | Hailin Wu, Saijuan Xu, Zhen Zhuang, Genggeng Liu |