Zhiang Wang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
15
Venues
3
Active years
2021–2026
Best venue rank
A
Where they publish
Papers
15 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ASPDAC | PigMap3: A Physically Aware Incremental Mapping Framework with On-the-fly Post-Layout Critical Path Tracking. | Hongyang Pan, Cunqing Lan, Zhiang Wang, Xuan Zeng, Fan Yang, Keren Zhu |
| 2026 | ISCAS | HOLMES: Hierarchical Optimization with poLygonal ModEling for Large-Scale AMS Placement. | Guanhua Chen, Yujie Yan, Jiahua Liu, Zecheng Xu, Linxi Qiu, Yumao Wu, Zhiang Wang, Changhao Yan, Zhaori Bi, Keren Zhu |
| 2026 | ISCAS | LSMC Meets GPU Acceleration: Scalable and High-Quality Multi-Row Detailed Placement. | Andrew B. Kahng, Jason Liang, Zhiang Wang |
| 2026 | ISCAS | PhySeqForm: A Data-Driven, Physical Synthesis Sequence Former. | Cunqing Lan, Zijian Jiang, Hongyang Pan, Zhiang Wang, Keren Zhu |
| 2026 | ISCAS | RC-Scaled Timing-Driven Routing: Bridging Targeted Timing Optimization and Massively. | Parallel Global Routing, Chuyu Wang, Zecheng Xu, Boxiang Song, Zhiang Wang, Fan Yang, Keren Zhu, Xuan Zeng |
| 2026 | ISCAS | Layout-Aware Standard Cell Synthesis via Reparameterization Multi-Task Bayesian Optimization. | Zhouyang Wu, Ruiyu Lyu, Keren Zhu, Zhiang Wang, Zhaori Bi, Changhao Yan, Xuan Zeng |
| 2025 | ASPDAC | Use Cases and Deployment of ML in IC Physical Design. | Amur Ghose, Andrew B. Kahng, Sayak Kundu, Yiting Liu, Bodhisatta Pramanik, Zhiang Wang, Dooseok Yoon |
| 2025 | ICCAD | Invited: IEEE DATC RDF-2025: Enabling an EDA Research Ecosystem. | Vidya A. Chhabria, Amur Ghose, Vikram Gopalakrishnan, Andrew B. Kahng, Sayak Kundu, Yiting Liu, Zhiang Wang, Bing-Yue Wu |
| 2024 | ICCAD | Strengthening the Foundations for IC Physical Design and ML EDA Research. | Vidya A. Chhabria, Vikram Gopalakrishnan, Andrew B. Kahng, Sayak Kundu, Zhiang Wang, Bing-Yue Wu, Dooseok Yoon |
| 2024 | ICCAD | Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement. | Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu |
| 2023 | ICCAD | An Open-Source Constraints-Driven General Partitioning Multi-Tool for VLSI Physical Design. | Ismail Bustany, Grigor Gasparyan, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang |
| 2023 | ICCAD | Invited Paper: IEEE CEDA DATC Emerging Foundations in IC Physical Design and MLCAD Research. | Jinwook Jung, Andrew B. Kahng, Sayak Kundu, Zhiang Wang, Dooseok Yoon |
| 2022 | ICCAD | SpecPart: A Supervised Spectral Framework for Hypergraph Partitioning Solution Improvement. | Ismail Bustany, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang |
| 2022 | ICCAD | IEEE CEDA DATC: Expanding Research Foundations for IC Physical Design and ML-Enabled EDA. | Jinwook Jung, Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang |
| 2021 | ICCAD | VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis. | Hadi Esmaeilzadeh, Soroush Ghodrati, Jie Gu, Shiyu Guo, Andrew B. Kahng, Joon Kyung Kim, Sean Kinzer, Rohan Mahapatra, Susmita Dey Manasi, Edwin Mascarenhas, Sachin S. Sapatnekar, Ravi Varadarajan, Zhiang Wang, Hanyang Xu, Brahmendra Reddy Yatham, Ziqing Zeng |