| 2026 | DATE | Input Sparsity Aware In-Memory Computing Macro Based on SOT-MRAM Multi-Level Cell for Efficient Deep Neural Network Acceleration. | Chao Wang, Qihang Gao, Xianzeng Guo, Zhongzhen Tong, Zhaohao Wang, Weisheng Zhao |
| 2026 | DATE | A Low Power and High Reliability Nonvolatile SRAM Using In-Plane VGSOT-MRAM with Pre-Charge Restore Scheme. | Xiaoyang Xu, Chenyi Wang, Zhongzhen Tong, Mingche Li, Weimeng Zhao, Zhongkui Zhang, Yaling Wang, Chao Wang, Zhaohao Wang |
| 2026 | ISCAS | Highly Energy-Efficient In-Memory Computing Architecture Based on VGSOT-MRAM for Reconfigurable BNN/TNN Acceleration. | Qihang Gao, Chao Wang, Chenghang Li, Zhongzhen Tong, Zhaohao Wang |
| 2026 | ISCAS | Multi-Retention and Bit-Level Approximate STT-MRAM for High-Efficiency AI Applications. | Yulong Qiu, Chao Wang, Weimeng Zhao, Zhongzhen Tong, Zhaohao Wang |
| 2026 | ISCAS | A Fully-Parallel Digital MRAM Computing-in-Memory Macro Featuring a High-Efficient Dynamic Adder Tree and Bit-Splitting MAC. | Zhongzhen Tong, Jiye Yao, Shaohui Ma, Yulong Qiu, Zhaohao Wang, Amara Amara, Xiaoyang Lin |
| 2025 | ISCAS | Approximate SOT-MRAM for Neural Network Acceleration with Superior Read Performance. | Yulong Qiu, Chao Wang, Zhongzhen Tong, Siyuan Cheng, Yueting Li, Zhaohao Wang |