| 2021 | HPCC | A Noc Centric Low Overhead Multi-chip Interconnection Technology. | Xing Hu, Yang Zhang, Li Mao, Jie Shen, Zuocheng Xing |
| 2020 | ICASSP | A Low-Latency Successive Cancellation Hybrid Decoder for Convolutional Polar Codes. | Yu Wang, Shikai Qiu, Lirui Chen, Qinglin Wang, Yang Zhang, Cang Liu, Zuocheng Xing |
| 2020 | ISCAS | A Paralleled Greedy LLL Algorithm for 1616 MIMO Detection. | Lirui Chen, Yu Wang, Zuocheng Xing, Shikai Qiu, Qinglin Wang, Yang Zhang |
| 2019 | WCNC | Algorithm and Architecture for Path Metric Aided Bit-Flipping Decoding of Polar Codes. | Yu Wang, Lirui Chen, Qinglin Wang, Yang Zhang, Zuocheng Xing |
| 2016 | TrustCom | An Architecture of Parallel Tiled QRD Algorithm for MIMO-OFDM Systems. | Cang Liu, Chuan Tang, Zuocheng Xing, Lirui Chen, Yang Zhang, Guitao Fu |
| 2016 | TrustCom | Locality Protected Dynamic Cache Allocation Scheme on GPUs. | Yang Zhang, Zuocheng Xing, Li Zhou, Chunsheng Zhu |
| 2014 | DSD | Flexible Virtual Channel Power-Gating for High-Throughput and Low-Power Network-on-Chip. | Feng Wang, Xiantuo Tang, Qinglin Wang, Zuocheng Xing, Hengzhu Liu |
| 2013 | TrustCom | An Optimizing Strategy Research of LDPC Decoding Based on GPGPU. | Luechao Yuan, Zuocheng Xing, Yang Zhang, Xiaobao Chen |
| 2007 | ISCA | A 64-bit stream processor architecture for scientific applications. | Xuejun Yang, Xiaobo Yan, Zuocheng Xing, Yu Deng, Jiang Jiang, Ying Zhang |