An Analysis Method with Failure Scenario Matrix for Specifying Unexpected Obstacles in Embedded Systems.
Toshiro Mise, Masaaki Hashimoto, Keiichi Katamine, Yasufumi Shinyashiki, Naoyasu Ubayashi, Takako Nakatani
Browse the full APSEC paper archive.
Toshiro Mise, Masaaki Hashimoto, Keiichi Katamine, Yasufumi Shinyashiki, Naoyasu Ubayashi, Takako Nakatani
Browse the full APSEC paper archive.