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Paper
Clock design of 300MHz 128-bit 2-way superscalar microprocessor.
Fujio Ishihara
,
Christian Klinger
,
Ken-ichi Agawa
Venue
B
ASPDAC
Year
2000
Proceedings
ASP-DAC
DBLP record
conf/aspdac/IshiharaKA00 ↗
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