LayNet: Layout Size Prediction for Memory Design Using Graph Neural Networks in Early Design Stage.
Hye Rim Ji, Jong Seong Kim, Jung Yun Choi, Jee Hyong Lee
Browse the full ASPDAC paper archive.
Hye Rim Ji, Jong Seong Kim, Jung Yun Choi, Jee Hyong Lee
Browse the full ASPDAC paper archive.