Integrated interconnect circuit modeling for VLSI design.
Won-Young Jung, Ghun-Up Cha, Young-Bae Kim, Jun-Ho Baek, Choon-Kyung Kim
Browse the full ASPDAC paper archive.
Won-Young Jung, Ghun-Up Cha, Young-Bae Kim, Jun-Ho Baek, Choon-Kyung Kim
Browse the full ASPDAC paper archive.