Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noise.
Xiaolue Lai, Yayun Wan, Jaijeet S. Roychowdhury
Browse the full ASPDAC paper archive.
Xiaolue Lai, Yayun Wan, Jaijeet S. Roychowdhury
Browse the full ASPDAC paper archive.