Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
DAC
/
Paper
Analysis of timing failures due to random AC defects in VLSI modules.
Nandakumar N. Tendolkar
Venue
A*
DAC
Year
1985
Proceedings
DAC
DBLP record
conf/dac/Tendolkar85 ↗
Browse the full
DAC paper archive
.