HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors.
Yatish Turakhia, Bharathwaj Raghunathan, Siddharth Garg, Diana Marculescu
Browse the full DAC paper archive.
Yatish Turakhia, Bharathwaj Raghunathan, Siddharth Garg, Diana Marculescu
Browse the full DAC paper archive.