Formal verification of analog circuits in the presence of noise and process variation.
Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zaki, Sofine Tahar, Lawrence C. Paulson
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Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zaki, Sofine Tahar, Lawrence C. Paulson
Browse the full DATE paper archive.