Design of Multi-Output Switched-Capacitor Voltage Regulator via Machine Learning.
Zhiyuan Zhou, Syrine Belakaria, Aryan Deshwal, Wookpyo Hong, Janardhan Rao Doppa, Partha Pratim Pande, Deukhyoun Heo
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Zhiyuan Zhou, Syrine Belakaria, Aryan Deshwal, Wookpyo Hong, Janardhan Rao Doppa, Partha Pratim Pande, Deukhyoun Heo
Browse the full DATE paper archive.