ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core Accelerators.
Shantian Qin, Wenming Li, Zhihua Fan, Zhen Wang, Tianyu Liu, Haibin Wu, Kunming Zhang, Xuejun An, Xiaochun Ye, Dongrui Fan
Browse the full HPCC paper archive.
Shantian Qin, Wenming Li, Zhihua Fan, Zhen Wang, Tianyu Liu, Haibin Wu, Kunming Zhang, Xuejun An, Xiaochun Ye, Dongrui Fan
Browse the full HPCC paper archive.