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ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core Accelerators.

Shantian Qin, Wenming Li, Zhihua Fan, Zhen Wang, Tianyu Liu, Haibin Wu, Kunming Zhang, Xuejun An, Xiaochun Ye, Dongrui Fan

VenueCHPCC
Year2023
ProceedingsHPCC/DSS/SmartCity/DependSys

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