SpeedLLM: An FPGA Co-design of Large Language Model Inference Accelerator.
Peipei Wang, Wu Guan, Liping Liang, Zhijun Wang, Hanqing Luo, Zhibin Zhang
Browse the full HPDC paper archive.
Peipei Wang, Wu Guan, Liping Liang, Zhijun Wang, Hanqing Luo, Zhibin Zhang
Browse the full HPDC paper archive.