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A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints.

Ermeson Carneiro de Andrade, Paulo Romero Martins Maciel, Gustavo Rau de Almeida Callou, Bruno Costa e Silva Nogueira

VenueCICDS
Year2009
ProceedingsICDS

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