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Paper
Accelerating 3-D capacitance extraction in deep sub-micron VLSI design using vector/parallel computing.
Nima Shahbazi
,
Hamid Sarbazi-Azad
Venue
B
ICPADS
Year
2007
Proceedings
ICPADS
DBLP record
conf/icpads/ShahbaziS07 ↗
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