RV-IR: An MLIR-Based Architecture-Aware Intermediate Representation for Heterogeneous RISC-V AI Acceleration.
Zexin Jian, Shuhui Jia, Chunwei Xia, Di Wang, Chenxi Wang
Browse the full ICS paper archive.
Zexin Jian, Shuhui Jia, Chunwei Xia, Di Wang, Chenxi Wang
Browse the full ICS paper archive.